1. Field
Example embodiments may relate generally to semiconductor circuit designs and verifications. Example embodiments may relate generally to methods of detecting stresses, methods of training compact models, methods of relaxing stresses, and/or computing systems.
2. Description of Related Art
In semiconductor circuits, such as integrated circuits, adjacent patterns may be formed from different materials. In cases where the materials of these adjacent patterns (e.g., an active pattern and an isolation layer pattern) have different expansion coefficients (or different coefficients of thermal expansion), each pattern may be under stress, and defects, such as standby leakage currents or cracks, may be caused by dislocation of one or more patterns.